WIRE Official Documents ?

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magneson
Is taking Resolume on a second date
Posts: 23
Joined: Wed May 31, 2023 08:58

Re: WIRE Official Documents ?

Post by magneson »

Some slight additions in the node description would be great!

An example can be the OR-related gates, which now says "A logical node representing an N-/X/-OR gate".

More useful hints could be:
"A logical gate representing an OR gate. Outputs true if any of the inputs are true"*
"A logical gate representing an NOR gate. Outputs true if none of the inputs are true"
"A logical gate representing an XOR gate. Outputs true if one of the inputs are true"

The "Any" gate has a description more in line with that ("Outputs true if any element is true").

producation
Met Resolume in a bar the other day
Posts: 9
Joined: Fri Dec 08, 2023 01:24

Re: WIRE Official Documents ?

Post by producation »

I feel you. Had the same thoughts a few days ago when I stumbled upon the examples :D But I think the main (target) audience of Wire might be not that familiar with logic gates so the example is quite helpful for anyone who does not have a background in IT, electrical engineering or mathematics.
However it would be nice if your suggestions could be added to the example to serve both worlds

magneson
Is taking Resolume on a second date
Posts: 23
Joined: Wed May 31, 2023 08:58

Re: WIRE Official Documents ?

Post by magneson »

producation wrote: Fri Jan 26, 2024 20:31 Wire might be not that familiar with logic gates so the example is quite helpful for anyone who does not have a background in IT, electrical engineering or mathematics.
Just intended as an example though, I can be a bit slow so need a reminder about the basics sometimes :D . Context also matters, as there are different approaches betwwen common node editors.

I would also wish there was a huge "IMPORTANT" marked chapter about best practices and resource usage between different approaches to instancing. I've been working on and off on a tiling patch, but has had a bad feeling about the resource usage, as every tile in essence was a duplicated composition-resolution texture.

At 1 tile with a radeon 7900xtx, this had a baseline of ≈2.5% GPU usage as reported by the activity monitor. Setting it to a 20 x 20 grid however increased it to ≈65% usage, 100 x 20 went above 90% . Not too surprising considering it then was 400 - 2000 textures at composition resolution (1080p).

After trying out a few different solutions, swapping to a Mesh2D and instancing the textured mesh instead had the same impact at 1 tile, but only went up to ≈6.5% at a 20 x 20 grid (400 tiles), and ≈8.5% at a 100 x 100 grid (10 000 tiles). However, the logic tree for the UI from the looks of it eats RAM and FPS at the larger scales. Going from about 200MB at 400 instances, to over 4 Gigs at 10 000 instances. At a 100 x 100 grid, I get 11 FPS with it in, and 60(locked) without it. Will have to look into this next.

Some info on pitfalls and how to avoid gluttonous workflows in that sense would be very welcome! :)

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